library ieee;
use ieee.std_logic_1164.all;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
use ieee.numeric_std.all;

-- Uncomment the following library declaration if instantiating
-- any Xilinx leaf cells in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

package sec_counter_pkg is
    component sec_counter is
        generic (
            CYCLES_SEC : integer := 100e6; -- 1/10ns
            MAX_SECS_LOG2 : integer := 16
    	);
        port (
            clk : in std_logic;
            res : in std_logic;

            tick     : out std_logic;
            cnt_secs : out integer
    	);
    end component;
end package;
